Such a data frame processing unit and such a line termination module are already known in the art, e.g. from the article `A broadband ISDN line termination chip set for 1.2 Gbit/s`, written by P. Meylemans, L. Cloetens, K. Adriaensen and D. Sallaerts and published in 1993 in the USA by IEEE. Therein, a set of line termination chips performing external transmission termination functions, external transfer mode termination functions, conversion between external transfer mode and internal transfer mode, and switch fabric termination functions is described. These chips are in fact line termination modules including data frame processing units.
Standardized data frames, processed by such a data frame processing unit however are often very lengthy. STM-1 frames for example, as described in the CCITT Recommendation G.709, published in 1991, have a total length of 2430 bytes. Processing such data frames is very time consuming and consequently test simulations, for testing the functionality of individual samples of the above mentioned line termination chips, require time periods to the extent of several hours. Solutions to speed up the testing of a data frame processing unit or a line termination module are usually searched in the use of faster computers controlling this module or unit, but such computers are very expensive.